High and Low Voltage PCB Redesign

Overview: Updated an aging PCB with four gate drivers, requiring enhanced isolation barriers and new mounting points while maintaining functionality.

Challenges: Integrating isolation between high-voltage gate drivers and low-voltage circuits, managing distinct power/return references, and routing low-voltage traces around new mounting holes.

Solution: Redesigned PCB layout to strengthen isolation barriers, optimized power/return references for each gate driver, and rerouted low-voltage circuits to accommodate new mounting points.

Outcome: Delivered an updated PCB design with improved isolation, reliable functionality, and space-efficient low-voltage routing.

Overview: Designed a PCB for a three-phase system with high-power connectors and MOSFETs, requiring precise signal routing and opto-isolation for safety and performance.

Challenges: Assigning high-voltage signals to PCB layers, maintaining phase separation, and ensuring identical routing for all three current sense resistors.

Solution: Optimized layer assignments for high-voltage signals, implemented differential-like signal routing for MOSFET control, ensured phase isolation, and standardized routing for current shunts.

Outcome: Delivered a robust PCB design with safe phase separation, consistent current shunt routing, and reliable high-voltage performance.

 Overview: Designed a control and monitor card PCB featuring a BGA with three power rails, optimized for functionality without high-voltage components.

Challenges: Complex bus routing to BGA sections causing tangled traces, coordinating pin allocation changes, and avoiding overlapping bus routes across layers.

Solution: Collaborated with the schematic designer to reassign BGA signal-to-pin allocations within reference groups, optimized bus routing to untangle traces, and ensured non-overlapping bus paths across layers.

Outcome: Achieved a clean, efficient PCB layout with untangled bus routing and optimized BGA functionality.

Overview: Refurbished a 10+ year-old PCB project in Cadence, upgrading the FPGA while maintaining the original design's integrity.

Challenges: Reconstructing the PCB from outdated schematics and gerbers, ensuring precise component and VIA placement, and matching original trace thickness.

Solution: Converted gerbers to DXF files and imported them accurately, placed components and VIAs in their original positions, and routed the board to match the exact trace thickness.

Outcome: Successfully upgraded the FPGA, delivering a fully reconstructed PCB with preserved design fidelity.